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A Monolithic Digital Clock-Generator for On-Chip Clocking of Custom DSP's

Författare:
Publiceringsår: 1996
Språk: Engelska
Sidor: 700-706
Publikation/Tidskrift/Serie: IEEE Journal of Solid-State Circuits
Volym: 31
Nummer: 5
Dokumenttyp: Artikel
Förlag: IEEE

Sammanfattning

This paper shows a robust and easily implemented clock generator for custom designs. It is a fully digital design suitable for both high-speed clocking and low-voltage applications. This clocking method is digital, and it avoids analog methods like phase locked loops or delay line loops. Instead, the clock generator is based on a ring counter which stops a ring oscillator after the correct number of cycles. Both a 385 MHz clock and a 15 MHz custom DSP application using the on-chip clocking strategy are described. The prototypes have been fabricated in a 0.8 μm standard CMOS process. The major advantages with this clocking method are robustness, small size, low-power consumption, and that it can operate at a very low supply voltage

Disputation

Nyckelord

  • Technology and Engineering

Övrigt

Published
Yes
  • Elektronikkonstruktion
  • ISSN: 0018-9200

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