DT Modeling of Clock Phase Noise Effects in LP CT Delta-Sigma ADCs with RZ Feedback
Publikation/Tidskrift/Serie: IEEE Transactions on Circuits and Systems - II: Express Briefs
- http://dx.doi.org/10.1109/TCSII.2009.2020950 (restricted access)
The performance of continuous-time (CT) Delta Sigma modulators is limited by their sensitivity to clock phase noise (PN). The clock PN-induced in-band noise (IBN) is dependent on the magnitude and frequency of both the desired in-band signals and the out-of-band signals, as well as the shape of the clock PN spectrum. This brief presents a discrete-time (DT) model of the dominant clock PN-induced errors. It enables fast and accurate simulations of the clock PN effects with arbitrary input signals, PN spectra, and noise-transfer functions. The model has been verified by CT simulations and measurements on a second-order low-pass CT Delta Sigma modulator with return-to-zero feedback. The flexibility and usefulness of the DT model are demonstrated, and the two dominant clock PN effects are compared by means of simulations with orthogonal frequency-division multiplexing input signals and various PN specifications.
- Electrical Engineering, Electronic Engineering, Information Engineering
- Analog RF
- Data converters & RF
- ISSN: 1549-7747