Single-electron transistors in heterostructure nanowires.

In English Semiconductor-based single-electron transistors have been fabricated using heterostructure nanowire growth, by introducing a double barrier of InP into InAs nanowires. From electrical measurements, we observe a charging energy of 4 meV for the approximately 55 nm diameter and 100 nm long InAs islands between the InP barriers. The Coulomb blockade can be periodically lifted as a function of gate voltage for all devices, which is a typical signature of single-island transistors. Homogeneous InAs nanowires show no such effect for the corresponding voltage ranges. ©2003 American Institute of Physics.