Novel carry propagation in high-speed synchronous counters and dividers
Författare
Summary, in English
A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.
Publiceringsår
1993
Språk
Engelska
Sidor
1457-1458
Publikation/Tidskrift/Serie
Electronics Letters
Volym
29
Issue
16
Dokumenttyp
Artikel i tidskrift
Förlag
IEE
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Status
Published
ISBN/ISSN/Övrigt
- ISSN: 1350-911X