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A CMOS implementation of a video-rate successive approximation A/D converter

Författare:
Publiceringsår: 1988
Språk: Engelska
Sidor: 2577-2580
Volym: 3
Dokumenttyp: Konferensbidrag
Förlag: IEEE

Sammanfattning

Previous approaches to video-rate CMOS A/D (analog-to-digital) converters are based on fully-parallel, subrange, or pipeline architectures. The authors describe a 5-MHz 8-bit experimental design of a successive-approximation A/D converter using 3-μm CMOS technology. Since neither capacitors nor a resistor string are needed in the current-switching technique, a conventional digital technology can be used. The use of the CMOS current-switch technique makes bipolar input signals possible. A circuit realization of a high-speed successive approximation register is also presented, using a single phase clock. The proposed technique is compatible with digital VLSI technology.

Disputation

Nyckelord

  • Technology and Engineering

Övriga

IEEE International Symposium on Circuits and Systems, 1988
1988-06-07/1988-06-09
Espoo, Finland
Published
Yes

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