A CMOS implementation of a video-rate successive approximation A/D converter
Previous approaches to video-rate CMOS A/D (analog-to-digital) converters are based on fully-parallel, subrange, or pipeline architectures. The authors describe a 5-MHz 8-bit experimental design of a successive-approximation A/D converter using 3-μm CMOS technology. Since neither capacitors nor a resistor string are needed in the current-switching technique, a conventional digital technology can be used. The use of the CMOS current-switch technique makes bipolar input signals possible. A circuit realization of a high-speed successive approximation register is also presented, using a single phase clock. The proposed technique is compatible with digital VLSI technology.
- Electrical Engineering, Electronic Engineering, Information Engineering
IEEE International Symposium on Circuits and Systems, 1988