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An embedded low power FIR filter

Författare:
Publiceringsår: 2001
Språk: Engelska
Sidor: 230-233
Publikation/Tidskrift/Serie: Proceedings of the 2001 IEEE International Symposium on Circuits and Systems,
Volym: 4
Dokumenttyp: Konferensbidrag

Sammanfattning

A new sampler with embedded FIR filter was designed with the charge sampling technique. The filter functions by summing the weighted current on a passive capacitor and the weighting factors are decided by the FIR coefficients. The performance of the filter can well compete with conventional analog filter but with smaller area and less power consumption. A testing chip was designed with 2 V supply, 7 mW power consumption and 0.4 mm2 area in 0.35 μm CMOS technology

Disputation

Nyckelord

  • Technology and Engineering

Övriga

ISCAS 2001
2001-05-06/2001-05-09
Sydney, Australia
Published
Yes

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