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An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint

In English

Författare

Summary, in English

The quality of test is highly related to the number of faults that can be detected during the testing (fault coverage) and the defect probability of each testable unit. High test quality is reached by applying an excessive number of good test vectors, however, such a high test data volume can be problematic to fit in the ATE's (automatic test equipment) limited memory. We therefore propose, for core-based designs, a scheme that selects test vectors for each core, and schedule the test vectors in such a way that the test quality is maximized under a given test time constraint given by the ATE memory depth.

Publiceringsår

2004

Språk

Engelska

Sidor

254-257

Publikation/Tidskrift/Serie

[Host publication title missing]

Dokumenttyp

Konferensbidrag

Förlag

IEEE - Institute of Electrical and Electronics Engineers Inc.

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering

Nyckelord

  • testing
  • fault coverage
  • defect probabilities
  • embedded systems

Conference name

2004 IEEE Asian Test Symposium ATS 2004

Conference date

0001-01-02

Status

Published

ISBN/ISSN/Övrigt

  • ISSN: 1081-7735
  • ISBN: 0-7695-2235-1