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A Distributed Architecture to Check Global Properties for Post-Silicon Debug

Författare:
Publiceringsår: 2010
Språk: Engelska
Dokumenttyp: Konferensbidrag
Förlag: IEEE

Sammanfattning

Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking global properties that are distributed on the chip. In this paper we define an architecture to non-intrusively observe global properties at run time using distributed monitors. The architecture enables to perform actions when a property holds, such as stopping (part of) the system for inspection. We apply this architecture to the problem of software races that result in incorrect communication between concurrent tasks on different processors. In a case study, where we implemented monitors, event distribution, and instruments to stop communication between intellectual property (IP) blocks, we demonstrate that these races can be detected and classified as timing violations or as FIFO protocol violations.

Disputation

Nyckelord

  • Technology and Engineering

Övriga

IEEE European Test Symposium (ETS'10)
2014-05-26
Prague, Czech Republic
Published
Yes

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