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On Minimization of Peak Power for Scan Circuit during Test

In English

Författare

  • Jaynarayan T. Tudu
  • Erik Larsson
  • Virendra Singh
  • Vishwani Agrawal

Summary, in English

Scan circuit generally causes excessive switching activity compared to normal circuit operation. The higher switching activity in turn causes higher peak power supply current which results into supply voltage droop and eventually yield loss. This paper proposes an efficient methodology for test vector re-ordering to achieve minimum peak power supported by the given test vector set. The proposed methodology also minimizes average power under the minimum peak power constraint. A methodology to further reduce the peak power, below the minimum supported peak power, by inclusion of minimum additional vectors is also discussed. The paper defines the lower bound on peak power for a given test set. The results on several benchmarks shows that it can reduce peak power by up to 27%.

Publiceringsår

2009

Språk

Engelska

Sidor

25-30

Publikation/Tidskrift/Serie

2009 14th IEEE European Test Symposium

Dokumenttyp

Konferensbidrag

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

European Test Symposium, ETS 2009

Conference date

2009-05-25 - 2009-05-29

Conference place

Sevilla, Spain

Status

Published

ISBN/ISSN/Övrigt

  • ISBN: 978-0-7695-3703-0