A Technique for Test Infrastructure Design and Test Scheduling
Författare
Summary, in English
Publiceringsår
2000
Språk
Engelska
Sidor
26-26
Publikation/Tidskrift/Serie
[Host publication title missing]
Länkar
Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- testing
- simulated annealing
- test scheduling
- test bus infrastructure
Conference name
Design and Diagnostic of Electronic Circuits and Systems Workshop DDECS
Conference date
0001-01-02
Status
Published