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A Technique for Test Infrastructure Design and Test Scheduling

Författare:
Publiceringsår: 2000
Språk: Engelska
Sidor:
Dokumenttyp: Konferensbidrag
Förlag: IEEE Computer Society Press

Sammanfattning

We propose a technique for test scheduling and design of test bus infrastructure where test application time and test bus length and width are minimized while constraints on power consumption and test resources are considered. Our approach is suitable for repeated use in the design space exploration process due to its low computational cost. For the final design, we use simulated annealing to optimize the solution. Our technique has been implemented and experimental results show the efficiency of our approach.

Disputation

Nyckelord

  • Technology and Engineering
  • testing
  • simulated annealing
  • test scheduling
  • test bus infrastructure

Övrigt

Design and Diagnostic of Electronic Circuits and Systems Workshop DDECS
2014-08-22
Published
Yes

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