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An Integrated System-on-Chip Test Framework

Författare:
Publiceringsår: 2008
Språk: Engelska
Sidor: 439-454
Dokumenttyp: Del av eller Kapitel i bok
Förlag: Springer

Sammanfattning

In this paper we propose a framework for the testing of system-on-chip (SOC), which includes a set of design algorithms to deal with test scheduling, test access mechanism design, test sets selection, test parallelization, and test resource placement. The approach minimizes the test application time and the cost of the test access mechanism while considering constraints on tests, power consumption and test resources. The main feature of our approach is that it provides an integrated design environment to treat several different tasks at the same time, which were traditionally dealt with as separate problems. Experimental results shows the efficiency and the usefulness of the proposed technique.

Disputation

Nyckelord

  • Technology and Engineering
  • testing
  • system-on-chip
  • SOC
  • framework
  • integrated testing

Övriga

Published
  • ISBN: 978-1-4020-6487-6

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