Reconfigurable cell array for concurrent support of multiple radio standards by flexible mapping
Författare
Summary, in English
This paper presents a flexible architecture suitable for concurrent processing of multiple radio standards. The proposed architecture is based on a coarse-grained reconfigurable cell array, consisting of distinct processing and memory cells. Flexibility of the architecture is demonstrated by performing a coarse time synchronization and fractional frequency offset estimation for multiple OFDM standards. The radio standards under analysis are IEEE 802.11n, LTE, and DVB-H. The reconfigurable cell array, containing 2-by-2 cells, is capable of processing two concurrent data streams from the standards. Dynamic reconfigurability of the architecture enables run-time switching between the standards. The implemented 2-by-2 cell array is synthesized using a 65 nm low-leakage standard cell CMOS library, resulting in an area of 0.479mm2 and a maximum clock frequency of 534MHz. High flexibility offered by the reconfigurable cell array allows the adoption of different algorithms onto the same platform.
Avdelning/ar
Publiceringsår
2011
Språk
Engelska
Sidor
1696-1699
Publikation/Tidskrift/Serie
IEEE International Symposium on Circuits and Systems
Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Computer Science
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- CGRA
- Reconfigurable cell array
- Multi-standard
- Concurrent
- OFDM
- Synchronization
Conference name
IEEE International Symposium on Circuits and Systems (ISCAS 2011), 2011
Conference date
2011-05-15 - 2011-05-18
Conference place
Rio de Janeiro, Brazil
Status
Published
Projekt
- EIT_SOS VINNOVA Industrial Excellence Center - System Design on Silicon
Forskningsgrupp
- Digital ASIC
ISBN/ISSN/Övrigt
- ISSN: 0271-4310
- ISSN: 2158-1525
- ISBN: 978-1-4244-9473-6