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A 90nm CMOS Gated-Ring-Oscillator-Based Vernier Time-to-Digital Converter with Improved Resolution

Författare:
Publiceringsår: 2011
Språk: Engelska
Sidor: 459-462
Dokumenttyp: Konferensbidrag

Sammanfattning

Two gated ring oscillators (GRO) act as the delay lines in an improved Vernier time-to-digital converter (TDC). The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been implemented in a 90nm CMOS technology and achieves a resolution better than 5ps for a signal bandwidth of 800kHz. The current consumption is 3mA from 1.2V when operating at 25MHz.

Disputation

Nyckelord

  • Technology and Engineering
  • Time-to-Digital Converter
  • Gated Ring Oscillator
  • Vernier Delay Line

Övriga

ESSCIRC
2011-09-16
Helsinki, Finland
Published
Yes
  • ISSN: 1930-8833
  • ISBN: 978-1-4577-0703-2

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