Webbläsaren som du använder stöds inte av denna webbplats. Alla versioner av Internet Explorer stöds inte längre, av oss eller Microsoft (läs mer här: * https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Var god och använd en modern webbläsare för att ta del av denna webbplats, som t.ex. nyaste versioner av Edge, Chrome, Firefox eller Safari osv.

1/f Noise Sources in Dual-Gated Indium Arsenide Nanowire Transistors

In English

Författare

Summary, in English

1/f noise is studied in dual-gated InAs nanowire transistors consisting of an omega top gate with high-k atomic layer deposited dielectric and silicon dioxide to substrate back gate. Noise spectra at varying gate bias combinations are compared from devices with differing top-gate lengths to separate the noise contributions of the top-gated channel from the ungated access portion, including the metal-nanowire contacts. For a given device geometry, it is possible to bias the device into four different regimes where the resistance and the noise amplitude can each be independently dominated by either the channel or the access/contact regions. When the device is fully in the on state, the access/contact regions dominate both resistance and noise. When the device is operating near or below threshold, the channel dominates resistance and noise. For the lowest amount of overall 1/f noise, most of the nanowire should be covered by the top gate, minimizing the access region length.

Publiceringsår

2012

Språk

Engelska

Sidor

1980-1987

Publikation/Tidskrift/Serie

IEEE Transactions on Electron Devices

Volym

59

Issue

7

Dokumenttyp

Artikel i tidskrift

Förlag

IEEE - Institute of Electrical and Electronics Engineers Inc.

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering
  • Condensed Matter Physics

Nyckelord

  • Indium Arsenide
  • low-frequency noise
  • nanowire FETs

Status

Published

ISBN/ISSN/Övrigt

  • ISSN: 0018-9383