Publikationer
Selective Channelization on an SDR Platform for LTE-A Carrier Aggregation.
Avdelning/ar:
Publiceringsår: 2012
Språk: Engelska
Dokumenttyp: Konferensbidrag
Sammanfattning
The total transmission bandwidth and component
carrier aggregation proposed by LTE-Advanced, sets a new
challenge to the design of terminals. This article presents a way
to assure terminals cope with the large bandwidth in an efficient
manner. Various filtering methods are explored showing that an
SDR architecture, such as ADRES (Architecture for Dynamically
Reconfigurable Embedded Systems), is suitable for dynamic
adaptation of filtering methods as function of the aggregation
scheme and the individual bandwidth assigned to each terminal.
This method is able to reduce the processing load by 70%
for LTE-A with legacy support and possibly higher reduction
when LTE legacy is not supported. Simulations conclude that the
performance loss derived from the proposed method is marginal
with no negative repercussion on the posterior baseband stages.
carrier aggregation proposed by LTE-Advanced, sets a new
challenge to the design of terminals. This article presents a way
to assure terminals cope with the large bandwidth in an efficient
manner. Various filtering methods are explored showing that an
SDR architecture, such as ADRES (Architecture for Dynamically
Reconfigurable Embedded Systems), is suitable for dynamic
adaptation of filtering methods as function of the aggregation
scheme and the individual bandwidth assigned to each terminal.
This method is able to reduce the processing load by 70%
for LTE-A with legacy support and possibly higher reduction
when LTE legacy is not supported. Simulations conclude that the
performance loss derived from the proposed method is marginal
with no negative repercussion on the posterior baseband stages.
Disputation
Nyckelord
- Technology and Engineering
- LTE-A
- Component Carrier Aggregation
- Fil- tering
- Channelization
- ADRES
- Software Defined Radio
- SDR.
Övrigt
International Conference on Electronics, Circuits, and Systems (ICECS)
2012-12-09/2012-12-10
Seville, Spain
Published
- EIT_SOS VINNOVA Industrial Excellence Center - System Design on Silicon
Yes
- Digital ASIC

