Runtime Voltage/Frequency Scaling for Energy-Aware Streaming Applications
Författare
Summary, in English
Power and energy consumption, today essential in all types of systems, can be reduced by scaling the voltage/frequency at runtime and/or powering down idle components.
Efficient management requires not only pertinent decisions, but also early access to workload information, as well as domain specific solutions. This paper focuses on runtime energy management for streaming applications running on multiprocessor platforms with dynamic voltage/frequency (speed) scaling capabilities.
Our energy management occurs at processor level, and employs a number of orthogonal techniques based on hints gathered from load history, buffer pressure and future workload estimates.
The manager operates both through speed adjustments and priorities. A preliminary evaluation based on a high-level simulation of an MPEG-4 SP decoder, shows that a combination of specific and generic techniques is the closest to an ideal energy lower bound.
Efficient management requires not only pertinent decisions, but also early access to workload information, as well as domain specific solutions. This paper focuses on runtime energy management for streaming applications running on multiprocessor platforms with dynamic voltage/frequency (speed) scaling capabilities.
Our energy management occurs at processor level, and employs a number of orthogonal techniques based on hints gathered from load history, buffer pressure and future workload estimates.
The manager operates both through speed adjustments and priorities. A preliminary evaluation based on a high-level simulation of an MPEG-4 SP decoder, shows that a combination of specific and generic techniques is the closest to an ideal energy lower bound.
Avdelning/ar
Publiceringsår
2012
Språk
Engelska
Sidor
1439-1443
Publikation/Tidskrift/Serie
Proceedings of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)
Fulltext
- Available as PDF - 370 kB
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Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Computer Science
Conference name
46th Annual Asilomar Conference on Signals, Systems, and Computers, 2012
Conference date
2012-11-04 - 2012-11-07
Conference place
Pacific Grove, California, United States
Status
Published
Projekt
- High Performance Embedded Computing
Forskningsgrupp
- ESDLAB
ISBN/ISSN/Övrigt
- ISSN: 1058-6393
- ISBN: 978-1-4673-5051-8
- ISBN: 978-1-4673-5050-1