Meny

Javascript verkar inte påslaget? - Vissa delar av Lunds universitets webbplats fungerar inte optimalt utan javascript, kontrollera din webbläsares inställningar.
Du är här

Bit-Serial CORDIC: Architecture and Implementation Improvements

Författare:
  • Johan Löfgren
  • Peter Nilsson
Publiceringsår: 2010
Språk: Engelska
Sidor: 65-68
Publikation/Tidskrift/Serie: Midwest Symposium on Circuits and Systems Conference Proceedings
Dokumenttyp: Konferensbidrag
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.

Sammanfattning

Abstract in Undetermined

This paper presents a new and improved bit-serial CORDIC architecture. A detailed description of the bit-serial implementation and its Control Unit is presented. It is shown that the improvement is due to a reduction of registers in the implementation and is made possible by ensuring that the angular path is calculated prior to the corresponding vector paths. In addition, the improved architecture is implemented in VHDL and synthesized for a UMC 130 nm technology. With the chosen parameters, a word length of 12 bits and 8 stages in the CORDIC, it is shown that the improved architecture is 20 % smaller and consumes 26 % less power.

Nyckelord

  • Electrical Engineering, Electronic Engineering, Information Engineering

Övriga

2010 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2010)
Published
  • Digital ASIC-lup-obsolete
  • ISSN: 1548-3746
  • ISSN: 1558-3899
  • ISBN: 978-1-4244-7773-9

Box 117, 221 00 LUND
Telefon 046-222 00 00 (växel)
Telefax 046-222 47 20
lu [at] lu.se

Fakturaadress: Box 188, 221 00 LUND
Organisationsnummer: 202100-3211
Om webbplatsen