FPGA implementation of controller-datapath pair in custom image processor design
Författare
Summary, in English
Publiceringsår
2004
Språk
Engelska
Sidor
141-144
Publikation/Tidskrift/Serie
Proceedings of the 2004 International Symposium on Circuits and Systems
Volym
5
Länkar
Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- Line memories
- Image processors
- Clock cycles
- Image size
Conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 2004
Conference date
2004-05-23 - 2004-05-26
Conference place
Vancouver, BC, Canada
Status
Published
ISBN/ISSN/Övrigt
- ISSN: 0271-4310
- ISSN: 2158-1525