An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average
Publikation/Tidskrift/Serie: Proceedings - IEEE International Symposium on Circuits and Systems
Förlag: Institute of Electrical and Electronics Engineers Inc.
A multiphase clock generator based on direct phase interpolation is presented. No feedback loop is required. A simple phase interpolation architecture is proposed, in which the two phase-adjacent signals are interpolated by using a series of resistors via inverters' discharging or charging slopes to generate multiphase outputs in a single stage. A phase error averaging circuit is used to correct interphase errors. The multiphase clock generator has been fabricated in a standard 0.35 μm, 3.3 V CMOS process. The measured performance shows it can operate at the input clock frequencies from 300 MHz to 600 MHz and has the rms jitter of 6 ps at 500 MHz.
- Electrical Engineering, Electronic Engineering, Information Engineering
- Multiphase clock generators
Proceedings of the 2003 IEEE International Symposium on Circuits and Systems
- ISSN: 0271-4310
- CODEN: PICSDI