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Teaching digital HW-design by implementing a complete MP3 decoder

Publiceringsår: 2003
Språk: Engelska
Sidor: 31-32
Dokumenttyp: Konferensbidrag
Förlag: IEEE Comput. Soc


This paper describes a project course that focuses on all the different stages in an ASIC design flow. The project starts at algorithm level, followed by architecture selection, netlist generation, down to physical layout, fabrication, and finally verification. The scope of the project, implementing a complete MP3 decoder in VHDL and sending it for fabrication, motivates the students to work hard towards a common goal



  • Technology and Engineering
  • VHDL
  • very high speed integrated circuits
  • hardware description languages
  • educational courses
  • MP3 decoder
  • netlist generation
  • integrated circuit verification
  • integrated circuit fabrication
  • application specific integrated circuits
  • integrated circuits architecture selection
  • digital HW-design
  • teaching
  • project course
  • hardware design
  • ASIC design


IEEE International Conference on Microelectronic Systems Education (MSE)
1-2 June 2003
Anaheim, CA, USA
  • Elektronikkonstruktion
  • ISBN: 0-7695-1973-3

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