Implementation of the signal component generator of a CALLUM 2 transmitter architecture in CMOS technology

In English This article presents an analog implementation of the signal component generator (SCG) of the CALLUM2 linear transmitter architecture. The proposed SCG is suited for integration in a standard 0.35 μm CMOS process, and has from simulations proven to be adequate when operating on an EDGE modulated baseband signal with a data rate of 270.833 ksymb/s. The total current consumption of the SCG is 2.0 mA from a 3.3 V supply. A variable-gain amplifier (VGA) with common-mode (CM) control is presented, and the VGA is inserted in between the SCG and the voltage-controlled oscillator (VCO) to adjust the loop gain, which has strong influence on the stability and spectral performance of the linear transmitter architecture. © 2004 IEEE.