A CMOS 500 MS/S charge sampler

In English A new sample-and-hold circuit based on the charge sampling technique is introduced, which integrates input current instead of tracking input voltage to realize high speed and low voltage sampling. Both the theoretical analysis and the experimental results prove that it can realize both sample-and-hold and amplification functions. A 500 MS/s charge sampling circuit is implemented in 0.25 μm CMOS process and measured. The dynamic range reaches 42 dB within the 250 MHz bandwidth. The power consumption is about 5 mW.