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A 2.4 GHz CMOS power amplifier using internal frequency doubling

Publiceringsår: 2005
Språk: Engelska
Sidor: 2683-2686
Publikation/Tidskrift/Serie: 2005 IEEE International Symposium On Circuits And Systems (Iscas), Vols 1-6, Conference Proceedings
Dokumenttyp: Konferensbidrag
Förlag: IEEE Press


A fully integrated 0.18 μm 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz



  • Electrical Engineering, Electronic Engineering, Information Engineering
  • output power
  • drain efficiency
  • CMOS power amplifier
  • oscillator pulling
  • VCO
  • low-IF upconversion
  • direct-upconversion
  • internal frequency doubling
  • 2.4 GHz
  • 0.18 micron


IEEE International Symposium on Circuits and Systems (ISCAS)
23-26 May 2005
Kobe, Japan
"©2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."
  • ISBN: 0-7803-8834-8

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