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Silent CMOS circuits aiming for system-on-chip

Författare:
Publiceringsår: 2005
Språk: Engelska
Sidor: 278-281
Publikation/Tidskrift/Serie: 2005 6th International Conference on ASIC Proceedings
Volym: 1
Dokumenttyp: Konferensbidrag
Förlag: IEEE Press
Additional info: Excellent paper award.

Sammanfattning

A silent CMOS circuit architecture is proposed. Different silent CMOS gate solutions are presented and compared to the normal CMOS precharged gate in switching noise level. A silent 16-bit parallel carry-look-ahead adder is demonstrated. Simulation results on the circuits and the post layout of the adder are given, which shows a 10 times reduction in noise level is possible

Disputation

Nyckelord

  • Technology and Engineering
  • 16 bit
  • parallel carry look ahead adder
  • switching noise
  • system-on-chip
  • silent CMOS circuit architecture
  • noise level reduction

Övriga

2005 6th International Conference on ASIC Proceedings
2005-10-24/2005-10-27
Shanghai, China
Published
Yes
  • ISBN: 0780392108
  • ISBN: 0-7803-9210-8

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