Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
Författare
Redaktör
- Rudy Lauwereins
- Jan Madsen
Summary, in English
We present an approach to process scheduling based on an abstract graph representation which captures both data-flow and the flow of control. Target architectures consist of several processors, ASICs and shared busses. We have developed a heuristic which generates a schedule table so that the worst case delay is minimized. Several experiments demonstrate the efficiency of the approach.
Publiceringsår
2008
Språk
Engelska
Sidor
15-29
Publikation/Tidskrift/Serie
Design, Automation, and Test in Europe : The Most Influential Papers of 10 Years DATE
Dokumenttyp
Del av eller Kapitel i bok
Förlag
Springer
Ämne
- Computer Science
Status
Published
Forskningsgrupp
- ESDLAB
ISBN/ISSN/Övrigt
- ISBN: 978-1-4020-6487-6
- ISBN: 978-1-4020-6488-3