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Low Power Unrolled CORDIC Architectures

Författare

  • Peter Nilsson
  • Yuhang Sun
  • Rakesh Gangarajaiah
  • Erik Hertz

Summary, in English

This paper shows a novel methodology to improve unrolled CORDIC architectures. The methodology is based on removing adder stages starting from the first stage. As an example, a 19-stage CORDIC is used but the methodology is applicable on CORDICs with an arbitrary number of stages. The CORDIC is implemented, simulated, and synthesized into hardware. In the paper, the performance is shown to be increased by 23% and that the dynamic power can be reduced by 27%.

Ämne

  • Other Electrical Engineering, Electronic Engineering, Information Engineering

Conference name

NORSIG 2015

Conference date

2015-10-26

Status

Published

Forskningsgrupp

  • Digital ASIC