Design of low-power, 1GS/s throughput FFT processor for MIMO-OFDM UWB communication system
Publikation/Tidskrift/Serie: [Host publication title missing]
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.
A new 8PBF structure for 64/128 flexible point FFT processor is proposed. The processor, which is based on 8*8*2 mixed radix algorithm, can deal with multiple inputs more efficiently for MIMO applications. The 8PFB structure efficiently brings the throughput of the processor up to 1GS/s and the chances of register reverse down, reducing the power dissipation remarkably. Meanwhile the modified shift-add algorithm can remove complex multipliers in the FFT processor.
- Electrical Engineering, Electronic Engineering, Information Engineering
2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
- ISBN: 1-4244-0920-9