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Xilinx Virtex II Pro implementation of a reconfigurable UMTS digital channel filter

Författare:
  • J Chandran
  • R Kaluri
  • Jugdutt Singh
  • Viktor Öwall
  • Ronny Veljanovski
Publiceringsår: 2004
Språk: Engelska
Sidor: 77-82
Publikation/Tidskrift/Serie: [Host publication title missing]
Dokumenttyp: Konferensbidrag

Sammanfattning

A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA.

Nyckelord

  • Electrical Engineering, Electronic Engineering, Information Engineering

Övriga

IEEE International Workshop on Electronic Design, Test and Applications (DELTA)
Published
  • ISBN: 0-7695-2081-2

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