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Java bytecode to hardware made easy with Bluespec System Verilog

Författare

Summary, in English

This paper presents a method for translation of Java bytecode sequences into synthesizable hardware, using the Bluespec System Verilog (BSV) environment. At the core of our approach lies a BSV description of a subset of Java bytecodes, that can be used to directly translate bytecode sequences into a BSV specification. The result is intended as an accelerator for existing Java processors (JOP, BlueJEP) or even standalone hardware. Preliminary evaluation shows our solution to produce hardware on par with established methods (area/performance), while supporting rare features (e.g. easy to automate, method calls and recursion).

Publiceringsår

2012

Språk

Engelska

Sidor

80-87

Publikation/Tidskrift/Serie

JTRES '12. Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems

Dokumenttyp

Konferensbidrag

Förlag

Association for Computing Machinery (ACM)

Ämne

  • Computer Science

Nyckelord

  • embedded systems
  • Java bytecode
  • Bluespec

Conference name

JTRES '12 10th International Workshop on Java Technologies for Real-time and Embedded Systems

Conference date

2012-10-24

Conference place

Copenhagen, Denmark

Status

Published

Forskningsgrupp

  • ESDLAB

ISBN/ISSN/Övrigt

  • ISBN: 978-1-4503-1688-0