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Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint

Publiceringsår: 2005
Språk: Engelska
Sidor: 429-434
Dokumenttyp: Konferensbidrag


The increasingtest data volume required to ensure high test quality when testinga System-on-Chip is becoming a problem since it (the test datavolume) must fit the ATE (Automatic Test Equipment) memory. In thispaper, we (1) define a test quality metric based on fault coverage,defect probability and number of applied test vectors, and (2) atest data truncation scheme. The truncation scheme combines (1)test data (vector) selection for each core based on our metric, and(2) scheduling of the execution of the selected test data, in sucha way that the system test quality is maximized, while the selectedtest data is guaranteed to fit the ATEs memory. We have implementedthe technique and the experimental results, produced at reasonableCPU times, on several ITC02 benchmarks show that high test qualitycan be achieved by a careful selection of testdata.


  • Electrical Engineering, Electronic Engineering, Information Engineering
  • testing
  • test scheduling
  • test quality optimization
  • ATE memory


IFIP WG 10.5 Conference on Very Large Scale Integration System-on-Chip {IFIP VLSI-SOC 2005}

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