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A low-jitter frequency synthesizer with dynamic phase interpolation for high-speed Ethernet

  • Ping Lu
  • Fan Ye
  • Junyan Ren
Publiceringsår: 2006
Språk: Engelska
Sidor: 2481-2484
Publikation/Tidskrift/Serie: [Host publication title missing]
Dokumenttyp: Konferensbidrag


A frequency synthesizer applied to 1000Base-T Ethernet transceiver as well as 10/100Base-T mode is described. A dynamic voltage-mode phase interpolator is used and a more precise analysis and calculation on degressive interpolating resistors are given. The design not only meets the transmitter's requirement of very accurate rising (falling) edge control but also offers much finer time-interval clocks compared to VCO natural multi-phase outputs. The chip was implemented in SMIC 0.18-mum standard CMOS technology and achieves an RMS jitter of 11ps with the crystal oscillator reference RMS jitter of 16ps. The power is smaller than 4mW from a 1.8V power supply in all modes


  • Electrical Engineering, Electronic Engineering, Information Engineering


IEEE International Symposium on Circuits and Systems, ISCAS 2006
  • ISBN: 0-7803-9389-9

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