Modeling and exploration of a reconfigurable architecture for digital holographic imaging
Publikation/Tidskrift/Serie: [Host publication title missing]
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.
The use of coarse-grain reconfigurable architectures (CGRA) is a suitable alternative for hardware acceleration in many application areas, including digital holographic imaging. In this paper, we propose a CGRA-based system with an array of processing and memory cells, which communicate using a local and a global communication network, and a stream memory controller to manage data transfers to external memory. We present our SystemC-based exploration environment (SCENIC) and methodology used to construct and evaluate systems containing reconfigurable architectures. A case study illustrates the advantages with rapid system level exploration to find and solve bottlenecks in complex designs prior to RTL description.
- Electrical Engineering, Electronic Engineering, Information Engineering
IEEE International Symposium on Circuits and Systems (ISCAS), 2008
- Digital ASIC-lup-obsolete
- ISBN: 978-1-4244-1683-7