Webbläsaren som du använder stöds inte av denna webbplats. Alla versioner av Internet Explorer stöds inte längre, av oss eller Microsoft (läs mer här: * https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Var god och använd en modern webbläsare för att ta del av denna webbplats, som t.ex. nyaste versioner av Edge, Chrome, Firefox eller Safari osv.

An Integrated Framework for the Design and Optimization of SOC Test Solutions

In English

Författare

Summary, in English

We propose an integrated framework for the design of SOC test solutions, which includes a set of algorithms for early design space exploration as well as extensive optimization for the final solution. The framework deals with test scheduling, test access mechanism design, test sets selection, and test resource placement. Our approach minimizes the test application time and the cost of the test access mechanism while considering constraints on tests and power consumption. The main feature of our approach is that it provides an integrated design environment to treat several different tasks at the same time, which were traditionally dealt with as separate problems. We have made an implementation of the proposed heuristic used for the early design space exploration and an implementation based on Simulated Annealing for the extensive optimization. Experiments on several benchmarks and industrial designs show the usefulness and efficiency of our approach.

Publiceringsår

2002

Språk

Engelska

Sidor

21-36

Publikation/Tidskrift/Serie

Frontiers in Electronic Testing

Dokumenttyp

Del av eller Kapitel i bok

Förlag

Springer

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering

Nyckelord

  • SOC
  • system-on-chip
  • test power consumption
  • test optimization

Status

Published

ISBN/ISSN/Övrigt

  • ISBN: 1-4020-7205-8