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A 90 nm CMOS 10 GHz beam forming transmitter

Publiceringsår: 2005
Språk: Engelska
Sidor: 375-378
Publikation/Tidskrift/Serie: ISSCS 2005. International Symposium on Signals, Circuits and Systems
Dokumenttyp: Konferensbidrag
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.


A 10 GHz beam forming transmitter was designed in a 90 nm CMOS process. Two power amplifiers with independently controllable phase enable the beam forming. The controllable phase is accomplished by switching in binary weighted transistors fed by quadrature signals, which are generated by a quadrature voltage controlled oscillator followed by a buffer. The design contains seven differential on-chip inductors, and consumes a total of 44.0 mA from a 1.2 V supply. The desired output power of 5 dBm per power amplifier is delivered at a power added efficiency of 22 % for the power amplifier


  • Electrical Engineering, Electronic Engineering, Information Engineering
  • beam forming transmitter
  • CMOS process
  • power added efficiency
  • 44.0 mA
  • 90 nm
  • 10 GHz
  • quadrature signal
  • 1.2 V
  • on-chip inductor
  • quadrature voltage controlled oscillator
  • controllable phase
  • buffer
  • binary weighted transistor
  • power amplifier


ISSCS 2005. International Symposium on Signals, Circuits and Systems
  • Elektronikkonstruktion-lup-obsolete
  • ISBN: 0-7803-9029-6

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