Design of low-power, 1GS/s throughput FFT processor for MIMO-OFDM UWB communication system

Summary, in English

A new 8PBF structure for 64/128 flexible point FFT processor is proposed. The processor, which is based on 8*8*2 mixed radix algorithm, can deal with multiple inputs more efficiently for MIMO applications. The 8PFB structure efficiently brings the throughput of the processor up to 1GS/s and the chances of register reverse down, reducing the power dissipation remarkably. Meanwhile the modified shift-add algorithm can remove complex multipliers in the FFT processor.

• Författare: Liang Liu; Xuejing Wang; Fan Ye; Junyan Ren
• Publiceringsår: 2007
• Språk: Engelska
• Sidor: 2594-2597
• Publikation/Tidskrift/Serie: [Host publication title missing]
• Länkar: http://dx.doi.org/10.1109/ISCAS.2007.377846
• Dokumenttyp: Konferensbidrag
• Förlag: IEEE - Institute of Electrical and Electronics Engineers Inc.
• Ämne: Electrical Engineering, Electronic Engineering, Information Engineering
• Conference name: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
• Conference date: 2007-05-27 - 2007-05-30
• Conference place: New Orleans, LA, United States
• Status: Published
• ISBN/ISSN/Övrigt: ISBN: 1-4244-0920-9