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60 GHz 130-nm CMOS Second Harmonic Power Amplifiers

Publiceringsår: 2008
Språk: Engelska
Sidor: 300-303
Publikation/Tidskrift/Serie: 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008), Vols 1-4
Dokumenttyp: Konferensbidrag
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.


Abstract—Two different frequency doubling power amplifiers

have been measured, one with differential and one with singleended input, both with single-ended output at 60 GHz. The amplifiers have been implemented in a 1p8M 130-nm CMOS process. The resonant nodes are tuned to 30 GHz or 60 GHz using on-chip transmission lines, which have been simulated in ADS and Momentum.

The measured input impedance of the single-ended PA is high at 250 Ω, and the differential input is similar, making the PA a suitable load for an oscillator in a fully integrated transmitter.

The single-ended and differential input PA delivers 1 dBm and 3 dBm, respectively, of measured saturated output power to 50 Ω, both with a drain efficiency of 8%.


  • Electrical Engineering, Electronic Engineering, Information Engineering
  • Power Amplifier
  • 60 GHz
  • CMOS


2008 IEEE Asia Pacific Conference on Circuits and Systems - APCCAS 2008
  • Elektronikkonstruktion-lup-obsolete
  • Analog RF-lup-obsolete

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