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Survivor path processing in Viterbi decoders using register exchange and traceforward

Författare:
Publiceringsår: 2007
Språk: Engelska
Sidor: 537-541
Publikation/Tidskrift/Serie: IEEE Transactions on Circuits and Systems - II - Express Briefs
Volym: 54
Nummer: 6
Dokumenttyp: Artikel i tidskrift
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.

Sammanfattning

This paper proposes a new class of hybrid VLSI

architectures for survivor path processing to be used in Viterbi decoders. The architecture combines the benefits of register exchange and trace-forward algorithms, that is, low memory requirement and latency versus implementation efficiency. Based on a structural comparison, it becomes evident that the architecture

can be efficiently applied to codes with a larger number

of states where usually trace-back-based architectures, which increase latency, are dominant.

Nyckelord

  • Electrical Engineering, Electronic Engineering, Information Engineering
  • (TB)
  • traceback
  • survivor path
  • convolutional codes
  • register exchange (RE)
  • traceforward (TF)
  • Viterbi decoder
  • VLSI

Övriga

Published
  • Digital ASIC: Flexible Coding and Decoding for Wireless Personal Area Networks
  • ISSN: 1558-3791

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