Publikationer
Low Power Optimization of Bit-Serial Digital Filters
Avdelning/ar:
Publiceringsår: 1997
Språk: Engelska
Sidor: 229-232
Publikation/Tidskrift/Serie: Tenth Annual IEEE International ASIC Conference and Exhibit, 1997. Proceedings.
Dokumenttyp: Konferensbidrag
Förlag: IEEE
Sammanfattning
A new approach to optimize full custom, fixed coefficient bit-serial filters aimed at high sample rate and low power consumption is presented. The idea is to trade the filter order with the coefficient length. To show the results two filters were designed and implemented, one as a minimum order filter and the other as a minimum coefficient filter. Measurements shows that a ten fold increase in sample rate can be obtained at half the power consumption
Disputation
Nyckelord
- Technology and Engineering
Övrigt
Tenth Annual IEEE International ASIC Conference and Exhibit (ASIC’97)
1997-09-07/1997-09-10
Portland, Oregon, USA
Published
Yes
- Elektronikkonstruktion
- ISBN: 0-7803-4283-6

