A hybrid interconnect network-on-chip and a transaction level modeling approach for reconfigurable computing
Författare
Summary, in English
Publiceringsår
2008
Språk
Engelska
Sidor
398-404
Publikation/Tidskrift/Serie
[Host publication title missing]
Fulltext
- Available as PDF - 516 kB
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Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Conference name
IEEE International Symposium on Electronic Design, Test & Applications (DELTA)
Conference date
2008-01-23 - 2008-01-25
Status
Published
Forskningsgrupp
- Digital ASIC
ISBN/ISSN/Övrigt
- ISBN: 978-0-7695-3110-6