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Xilinx Virtex II Pro implementation of a reconfigurable UMTS digital channel filter

Publiceringsår: 2004
Språk: Engelska
Sidor: 77-82
Dokumenttyp: Konferensbidrag


A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA.



  • Electrical Engineering, Electronic Engineering, Information Engineering


IEEE International Workshop on Electronic Design, Test and Applications (DELTA)
Perth, Australia
"©2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."
  • ISBN: 0-7695-2081-2

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