Design of RF Properties for Vertical Nanowire MOSFETs
Författare
Summary, in English
The RF performance of vertical nanowire metal-oxide-semiconductor field-effect transistors in realistic layouts has been calculated. The parasitic capacitances have been evaluated using full 3-D finite-element method calculations, combined with self-consistent Schrodinger-Poisson calculations for the intrinsic gate capacitances. It is shown that a performance comparable to planar FETs can be achieved in the vertical geometry by scaling the nanowire diameter and the wire-to-wire separation.
Avdelning/ar
Publiceringsår
2011
Språk
Engelska
Sidor
668-673
Publikation/Tidskrift/Serie
IEEE Transactions on Nanotechnology
Volym
10
Issue
4
Dokumenttyp
Artikel i tidskrift
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Condensed Matter Physics
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- Field-effect transistors
- InAs
- metal-oxide-semiconductor field-effect
- transistor (MOSFET)
- modeling
- nanowire
- parasitic capacitance
Status
Published
Forskningsgrupp
- Nano
ISBN/ISSN/Övrigt
- ISSN: 1536-125X