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Integrating Core Selection in the SOC Test Solution Design-Flow

Författare:
Publiceringsår: 2004
Språk: Engelska
Sidor: 1349-1358
Dokumenttyp: Konferensbidrag
Förlag: IEEE Computer Society Press

Sammanfattning

We propose a technique to integrate core selection in the SOC (system-on-chip) test solution design-flow. It can, in contrast to previous approaches, be used in the early design-space exploration phase (the core selection process) to evaluate the impact on the system's final test solution imposed by different design decisions, i.e. the core selection and the cores test characteristics. The proposed technique includes the interdependent problems: test scheduling, TAM (test access mechanism) design, test set selection and test resource floor-planning, and it minimizes a weighted cost function based on test time and TAM routing cost while considering test conflicts and test power limitations. An advantage with the technique is the novel three-level power model: system, power-grid, and core. We have implemented and compared the proposed technique, a fast estimation technique and a computational extensive pseudo-exhaustive method, and the results demonstrate that our technique produces high quality solutions at reasonable computational cost.

Disputation

Nyckelord

  • Technology and Engineering
  • testing
  • system-on-chip
  • test access mechanism
  • test scheduling
  • power optimization

Övriga

International Test conference ITC04
2014-11-26
Published
Yes
  • ISBN: 0-7803-8580-2

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