High frequency vertical InAs nanowire MOSFETs integrated on Si substrates
Författare
Summary, in English
RF and DC characterization of vertical InAs nanowire MOSFET on Si substrates are presented. Nanowire arrays are epitaxially integrated on Si substrates by use of a thin InAs buffer layer. For device fabrication, high-k HfO2 gate dielectric and wrap-gates are used. Post-deposition annealing of the high-k is evaluated by comparing one annealed and one not-annealed sample. The annealed sample show better DC characteristics in terms of transconductance, g(m) = 155 mS/mm, and on-current, I-on = 550 mA/mm. Box plots of on-current, on-resistance and transconductance for all 190-nanowire-array transistors on the annealed sample suggest that the electrical properties of the nanowires are preserved when scaling the nanowire diameter. Finally, high frequency characterisation yields a unity current gain cut-off frequency of f(t) = 9.3 GHz for the annealed sample and f(t) = 2.0 GHz for the not-annealed sample. (C) 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
Avdelning/ar
Publiceringsår
2012
Språk
Engelska
Sidor
350-353
Publikation/Tidskrift/Serie
Physica Status Solidi. C, Current Topics in Solid State Physics
Volym
9
Issue
2
Dokumenttyp
Artikel i tidskrift
Förlag
John Wiley & Sons Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
- Condensed Matter Physics
Nyckelord
- high-k
- annealing
- InAs
- high frequency
- nanowire
- MOSFET
Conference name
38th International Symposium on Compound Semiconductors (ISCS)/23rd International Conference on Indium Phosphide and Related Materials (IPRM)/Compound Semiconductor Week
Conference date
2011-05-22 - 2011-05-26
Conference place
Berlin, Germany
Status
Published
ISBN/ISSN/Övrigt
- ISSN: 1610-1634