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A 2.7-6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2

In English

Författare

Summary, in English

Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabilities of a single LC VCO. Fractional frequency multiplication is obtained by cascading a broadband injection locked modulo-two divider and a multiply-by-three circuit based on edge combining. The proposed solution is inductorless, thus very compact. It allows the generation of all frequencies from 2.7 to 6.1 GHz with a performance suitable for cellular standards. It shows a phase noise floor below -150 dBc/Hz and a spurious level below -35 dBc. The multiplier by 3/2 consumes 5 mA and the VCO draws 10 mA from a 1.2 V supply. The additional power consumption due to the multiplier trades with the small area penalty and the flexibility of this solution, compared to the use of multiple LC VCOs.

Publiceringsår

2013

Språk

Engelska

Sidor

11-20

Publikation/Tidskrift/Serie

Analog Integrated Circuits and Signal Processing

Volym

74

Issue

1

Dokumenttyp

Artikel i tidskrift

Förlag

Springer

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering

Nyckelord

  • Voltage controlled oscillator
  • Injection locking
  • Fractional frequency
  • multiplier
  • Edge combining

Status

Published

ISBN/ISSN/Övrigt

  • ISSN: 0925-1030