A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems
Författare
Summary, in English
A 128-channel neural signal processor for implantable neural recording microsystems is presented. The processor compresses the neural information of 128 simultaneous recording channels using discrete cosine transform, achieving a compression factor of 69 at the expense of a 5.6% root mean square error. The proposed processor is implemented on register transfer level and synthesized in a 65-nm complementary metal-oxide semiconductor process. The post-layout simulated power consumption at 1.2 V is 33.06 μW (258 nW per channel) at an area cost of 0.46 mm2
Publiceringsår
2015
Språk
Engelska
Sidor
489-501
Publikation/Tidskrift/Serie
International Journal of Circuit Theory and Applications
Volym
43
Issue
4
Dokumenttyp
Artikel i tidskrift
Förlag
John Wiley & Sons Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- Neural processsing
- data compression
- ASIC
- low power
Aktiv
Published
Forskningsgrupp
- Digital ASIC
ISBN/ISSN/Övrigt
- ISSN: 1097-007X