Webbläsaren som du använder stöds inte av denna webbplats. Alla versioner av Internet Explorer stöds inte längre, av oss eller Microsoft (läs mer här: * https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Var god och använd en modern webbläsare för att ta del av denna webbplats, som t.ex. nyaste versioner av Edge, Chrome, Firefox eller Safari osv.

A New Digital Front-End for Flexible Reception in Software Defined Radio

Författare

Summary, in English

Future mobile terminals are expected to support an ever increasing number of Radio Access Technologies (RAT) concurrently. This imposes a challenge to terminal designers already today. Software Defined Radio (SDR) solutions are a compelling alternative to address this issue in the digital baseband, given its high flexibility and low Non-Recurring Engineering (NRE) cost. However, the challenge still remains in the Digital Front-End (DFE), where many operations are too complex or energy hungry to be implemented as software instructions. Thus, new architectures are needed to feed the SDR digital baseband while keeping complexity and energy consumption at bay. In this article the architecture of a Digital Front-End Receiver (DFE-Rx) for the next-generation mobile terminals is presented. The flexibility needed for multi-standard support is demonstrated by detecting, synchronizing and reporting carrier-frequency offset, of multiple concurrent radio standards. Moreover, the proposed architecture has been fabricated in a 65 nm CMOS low power high-VT cell technology in a die size of 5 mm2. The core module of the DFE-Rx, the synchronization engine, has been measured at 1.2 V and reports an average power consumption of 1.9 mW during Wireless Local Area Network (WLAN) reception and 1.6 mW during configuration, while running at 10 MHz.

Publiceringsår

2015

Språk

Engelska

Sidor

889-900

Publikation/Tidskrift/Serie

Microprocessors and Microsystems

Volym

39

Issue

8

Dokumenttyp

Artikel i tidskrift

Förlag

Elsevier

Ämne

  • Electrical Engineering, Electronic Engineering, Information Engineering

Status

Published

Projekt

  • EIT_SOS VINNOVA Industrial Excellence Center - System Design on Silicon

Forskningsgrupp

  • Digital ASIC

ISBN/ISSN/Övrigt

  • ISSN: 0141-9331