Du är här

A 2048 complex point FFT processor using a novel data scaling approach

Författare:
Publiceringsår: 2003
Språk: Engelska
Sidor: 45-48
Publikation/Tidskrift/Serie: Proceedings - IEEE International Symposium on Circuits and Systems
Volym: 4
Dokumenttyp: Konferensbidrag
Förlag: Institute of Electrical and Electronics Engineers Inc.

Sammanfattning

In this paper, a novel data scaling method for pipelined FFT processors is proposed. By using data scaling, the FFT processor can operate on a wide range of input signals without performance loss. Compared to existing block scaling methods, like implementations of Convergent Block Floating Point (CBFP), the memory requirements can be reduced while preserving the SNR. The FFT processor has been synthesized and sent for fabrication in a 0.35μm standard CMOS technology. In netlist simulations, the FFT processor is capable of calculating a 2048 complex point FFT or IFFT in 27μs with a maximum clock frequency of 76MHz.

Disputation

Nyckelord

  • Technology and Engineering
  • Data scaling

Övriga

IEEE International Symposium on Circuits and Systems (ISCAS)
2014-05-27
Bangkok, Thailand
Published
Yes
  • ISSN: 0271-4310
  • CODEN: PICSDI

Box 117, 221 00 LUND
Telefon 046-222 00 00 (växel)
Telefax 046-222 47 20
lu [at] lu [dot] se

LERU logotype U21 logotype

Fakturaadress: Box 188, 221 00 LUND
Organisationsnummer: 202100-3211
Om webbplatsen