Binary Morphology With Spatially Variant Structuring Elements: Algorithm and Architecture
Författare
Summary, in English
Mathematical morphology with spatially variant structuring elements outperforms translation-invariant structuring elements in various applications and has been studied in the literature over the years. However, supporting a variable structuring element shape imposes an overwhelming computational complexity, dramatically increasing with the size of the structuring element. Limiting the supported class of structuring elements to rectangles has allowed for a fast algorithm to be developed, which is efficient in terms of number of operations per pixel, has a low memory requirement, and a low latency. These properties make
this algorithm useful in both software and hardware implementations, not only for spatially variant, but also translation-invariant morphology. This paper also presents a dedicated hardware architecture intended to be used as an accelerator in embedded system applications, with corresponding implementation results when targeted for both field programmable gate arrays and application specific integrated circuits.
this algorithm useful in both software and hardware implementations, not only for spatially variant, but also translation-invariant morphology. This paper also presents a dedicated hardware architecture intended to be used as an accelerator in embedded system applications, with corresponding implementation results when targeted for both field programmable gate arrays and application specific integrated circuits.
Publiceringsår
2009
Språk
Engelska
Sidor
562-572
Publikation/Tidskrift/Serie
IEEE Transactions on Image Processing
Volym
18
Issue
3
Fulltext
- Available as PDF - 889 kB
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Dokumenttyp
Artikel i tidskrift
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Nyckelord
- Mathematical Morphology
- spatially-variant structuring elements
- hardware implementation
Status
Published
Forskningsgrupp
- Elektronikkonstruktion
- Digital ASIC
ISBN/ISSN/Övrigt
- ISSN: 1941-0042