FLOPSYNC-2: efficient monotonic clock synchronisation
Författare
Summary, in English
consumption and synchronisation with clock monotonicity.
We propose an implementation of FLOPSYNC-2 on top of the microcontroller operating system Miosix, and prove the validity of our claims with several-days-long experiments on an eight-hop network. The experimental results show that the average clock difference among nodes is limited to a hundred of ns, with a sub-μs standard deviation. By introducing a suitable power model, we also prove that synchronisation is achieved with a sub-μA consumption overhead.
Avdelning/ar
Publiceringsår
2014
Språk
Engelska
Sidor
11-20
Publikation/Tidskrift/Serie
[Host publication title missing]
Fulltext
- Available as PDF - 268 kB
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Dokumenttyp
Konferensbidrag
Förlag
IEEE - Institute of Electrical and Electronics Engineers Inc.
Ämne
- Control Engineering
Nyckelord
- Synchronisation
- Wireless Sensor Network
Conference name
2014 IEEE Real-Time Systems Symposium (RTSS)
Conference date
2014-12-02
Status
Published
ISBN/ISSN/Övrigt
- ISSN: 1052-8725
- ISBN: 978-1-4799-7288-3