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High-level energy estimation in the sub-VT domain: simulation and measurement of a cardiac event detector

Publiceringsår: 2012
Språk: Engelska
Sidor: 15-27
Publikation/Tidskrift/Serie: IEEE Transactions on Biomedical Circuits and Systems
Volym: 6
Nummer: 1
Dokumenttyp: Artikel i tidskrift
Förlag: IEEE--Institute of Electrical and Electronics Engineers Inc.


This paper presents a flow that is suitable to estimate energy dissipation of digital standard-cell based designs which are determined to be operated in the sub-threshold regime. The flow is applicable on gate-level netlists, where back-annotated toggle information is used to find the minimum energy operation point, corresponding maximum clock frequency, as well as the dissipated energy per clock cycle. The application of the model

is demonstrated by exploring the energy efficiency of pipelining, retiming and register balancing. Simulation results, which are obtained during a fraction of SPICE simulation time, are validated by measurements on a wavelet based cardiac event detector that was fabricated in 65 nm low-leakage high-threshold technology. The mean of the absolute modeling error is calculated as 5.2 %, with a standard deviation of 6.6% over the measurement points. The cardiac event detector dissipates 0.88 pJ/sample at a supply voltage of 320mV.


  • Electrical Engineering, Electronic Engineering, Information Engineering
  • High-level energy estimation
  • sub-threshold
  • QRS detection
  • R-wave
  • cardiac pacemaker
  • energy model.


  • Digital ASIC-lup-obsolete
  • Elektronikkonstruktion-lup-obsolete
  • ISSN: 1932-4545

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